" FPGA and Artificial Intelligence"related to papers

Abstract:For coping with transmission and display problem caused by the huge amount of seamless spectrum data in real-time spectrum analyzer, this article designed a FIFO-based frame detector of real-time spectrum analyzer in FPGA. It combines multiple frames of spectrum data into one frame for transmission and refresh while retaining signal characteristics. By simulation and actual testing,results show that the detector has four types of detection: peak value, negative value, mean value and real-time sample value. It also can cut off the spectrum data outside the analysis bandwidth while detecting. Compared with the traditional RAM-based frame detector, the detector does not need to control RAM read and write addresses, is easy to implement, occupies less logic resources, and has been applied in real-time spectrum analyzers.

Abstract:When applying a cardiac scan, the image reconstruction only needs the expose data that sampled in the cardiac diastolic phase, and other periods sampled data are discarded. Therefore, the forward-looking scan pattern can be used in order to reduce the radiation dose. Due to the different cross sections of the scanning plane, the dose of modulation(DOM) can be used to reduce the radiation dose further. According to the attenuation difference of the cross section of the scanned object at different angles, the DOM adjusts the mA value based on the angles in real time, so the DOM can improve the xray efficiency and reduce the radiation dose. By combining the characteristics of the two, a forward-looking automatic tube current modulation control system for cardiac scanning is designed, which realizes the effect of reducing cardiac scanning radiation and getting good image quality.

Abstract:As a new type of communication system,FH communication has strong characteristics of anti-interception,anti-search,ant-interference and anti-antagonism. FH communication system is adopted in the tactical information distribution system,ground and shipborne and airborne FH radio stations and identification friend or Foe systems of the United states and NATO countries,which has high confidentiality and anti-interference performance.In view of the characteristics of high speed FH signal with wide frequency band,many frequency points and fast frequency hopping speed,this paper proposes to use two pieces of ADRV9009 RF agility chip to transform the high speed FH signal into zero IF signal,and then send it to PFGA through polyphase filtering digital channelization to complete the signal receiving and processing.The design not only simplifies the whole signal front-end wideband reception process,reduces the volume of the front-end analog channel receiving equipment,and reduces the power consumption of the system,but also greatly increases the flexibility of the syetem,and improves the detection and identification probability of high-speed frequency hopping signal in the end.

Abstract:Concerning the security threats such as firmware tampering and malicious code implanting in the startup process of system on a programmable chip(SoPC), a secure startup model is proposed. The model takes boot ROM as the trust root, and the public key algorithm and symmetric cipher algorithm are used to sign the firmware in each phase of the startup process. The digital signature value of each firmware image is verified in turn after SoPC is powered on, so as to establish a complete trust chain. In the implementation stage, the model is designed and verified by using Intel field programmable gate array(FPGA) development platform, and two secure boot modes are realized. The results show that the model can be applied to chip development to meet the requirement of secure startup.